1. Field of the Invention
This invention relates to methods of manufacturing semiconductor wafers, particularly single crystal silicon wafers.
2. Description of the Prior Art
A prior art method of manufacturing semiconductor wafers comprises a slicing step for obtaining thin disc-shape wafers through slicing a single crystal ingot obtained through pulling by using a single crystal pulling apparatus, a chamfering step for chamfering an outer periphery edge of a wafer for preventing chips and cracks of said sliced wafer, a lapping step for flattening the chamfered wafer surfaces, a wet etching step for removing a process damage layers remaining on the chamfering and lapping, a single-side mirror-polishing step for mirror-polishing one side surface of the etched wafers and a washing step for improving the cleanliness thereof by removing an abrasive and foreign particles remaining on the polished wafers.
The individual steps in the above prior art method, however, have various problems. In the first slicing step, in which the ingot is sliced into the thin disc-shape wafers with a circular internal blade slicer or a wire saw, a slight difference between right and left side of cutting resistances offered to the slicing blade prevent straight advancement of the blade cutting. As a result, swelling or warp is generated on the cutting surface. Such swelling or warp is a cause of cumbersome and troublesome processes in the subsequent steps.
In the lapping step, the warp cannot be removed although the swelling can be removed.
In the etching step, mixed acid or alkali aqueous solution is used as etching solution to remove the process damage layers which are generated by the previous mechanical processing. However, the flatness of the wafer surface is influenced by the activity of the etching solution, and it is required to remove the process damage layers while maintaining the flatness.
The polishing step uses a mechanical/chemical polishing process consisting of a plurality of stages, and a highly accurate mirror finish is obtained highly efficiently with a composite geometric effect in the dynamic function of mechanical polishing and the chemically removing function of etching. These functions are influenced by the proportions of mechanical element and chemical element during the polishing.
Japanese Patent Application Heisei 6-227291, filed by the applicant and not publicly known, proposes means for reducing swelling of as-cut wafers right after the above slicing process and before lapping, particularly unevenness or swelling of long cycles of 0.5 to 30 mm, as shown in FIG. 10. To preclude the long cycle swelling noted above, instead of holding a wafer 1 such that the back surface 1b thereof is directly chucking on the surface of chucking base plate 2 as shown in (A), wax or like adhesive 3 is provided between the wafer 1 and the base plate 2 as shown in (B), for absorbing long cycle unevenness or swelling etc. on the back surface 1b. (This technique is hereinafter referred to as first grinding technique.)
In this technique, with the wafer back surface 1b secured to the upper surface of the base plate 2 via the intervening adhesive 3, the unevenness of the back wafer surface 1b is held absorbed in the adhesive 3. In the other words, the adhesive 3 serves as unevenness absorber, and the surface polishing of the wafer 1 thus can be done without elastic deformation thereof even with unevenness present on the wafer back surface 1b. It is thus possible to maintain the flatness of the ground front surface 1a even when the adhesion is released.
In this prior art technique (not well known), clearances formed by above "swelling" generated on them when a wafer or like thin work is set on the base plate 2, are filled to prevent their transfer to the front surface of the work. The adhesive 3 may be fused wax, hot-melt adhesive, gypsum, ice, etc.
In Japanese Patent Application Heisei 8-80719, not public known, the application proposes other means for reducing swelling of cycles of about 0.5 to 30 mm. This proposition uses a vertical in-feed surface grinding machine, which has a cup-shaped grindstone with a wafer setting turntable providing variable wafer chucking force. Hereupon, "the in-feeds grinding" is meant the method which feed the grindstone perpendicularly to its frictional rotation surface. In this case, in the final grinding stage, i.e., a spark-out time, the chucking pressure on the wafer is switched over to a low pressure to grind the work, thereby removing the swelling. (This technique is hereinafter referred to as ground as second grinding technique.)
Specifically, as shown in FIG. 11, in an initial stage of grinding the work 1 is held for grinding under a suction pressure close to the normal vacuum as shown in (A). However, in a final stage (or spark-out time, i.e., zero in-feed grinding time) in which the grindstone feed pressure is reduced or substantially zero, the suction pressure is reduced to a pressure, under which the holding pressure can be maintained, as shown in (B). By so doing, the surface grinding can be made in a state that the elastic deformation force of the wafer is substantially reduced while maintaining the holding force, and the flatness obtained by the surface grinding can be maintained even by releasing the chucking.
When the thin wafer as the work of the surface grinding process is as-cut wafer right after the slicing, the suction pressure close to vacuum is suitably -600 to -760 mm Hg, and the suction pressure in the state that the elastic deformation force of the wafer is substantially released is suitably -100 to -50 mm Hg.
As the etching means, "A System for Removing Material from Wafers" is proposed in Japanese Laid-Open Patent Publication Heisei 5-160074, and "A Method and an Apparatus for Noncontacting Plasma Polishing and Smoothing of Uniformly Thinned Substrates" is proposed in Japanese Laid-Open Patent Publication 6-5571. According to this proposal, shape data of wafer before etching is fed back to a local etching stock removal to improve the thickness accuracy and flatness accuracy of the wafer after the etching. This plasma etching system is capable of noncontacting control of the process by plasma-assisted chemical etching.
This system permits removal of process damage layers or the like without reducing the flatness of the wafer, and the feedback of the shape data permits fine flattening through control of high frequency power supplied reactivity plasma gas and variation of the speed of the wafer in an X-Y direction.
In the single-side mirror-finish polishing step, the front wafer surface having been etched in the preceding etching step is brought to the single-side mirror-finish polishing step and has no problem. However, on the back wafer surface in which the large surface roughness is left as it is, the sharp ends of unevenness are broken off by chipping, generating a large number of particles and reducing the yield.
To solve this problem, the applicant has earlier proposed a technique in Japanese Patent Application Heisei 7-207514, not well known (prior art).
According to this proposal, a double-side wafer polishing step is incorporated in a method of semiconductor manufacture to improve the flatness of polished wafer, and also dust particle generation due to chipping from the back wafer surface by polishing of double-side wafer is suppressed to improve the yield of the apparatus.
With recent high function diversification, performance improvement, super-miniaturization, light weightiness and integration density increase of semiconductor, the high quality and large size of a wafer as substrate have been improved, and it is difficult to obtain highly accurate flatness of wafers of 200 to 300 mm and above in size. As an up-to-date method of wafer manufacture on a coming age, a manufacturing technique permitting high flatness and quality improvement is desired particularly for wafers of increased sizes.